implemented sweep and current steps processing. But not compiles

This commit is contained in:
2025-12-18 21:54:31 +03:00
parent 7f5d47d422
commit 01dae2bccd
51 changed files with 6745 additions and 5793 deletions

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cchYLLnp.s page 1
ARM GAS /tmp/cc3g0pRE.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock
29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance)
30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
ARM GAS /tmp/cchYLLnp.s page 2
ARM GAS /tmp/cc3g0pRE.s page 2
31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers
@ -118,7 +118,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
ARM GAS /tmp/cchYLLnp.s page 3
ARM GAS /tmp/cc3g0pRE.s page 3
88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
@ -178,7 +178,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt
144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
ARM GAS /tmp/cchYLLnp.s page 4
ARM GAS /tmp/cc3g0pRE.s page 4
145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector.
@ -238,7 +238,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void)
201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
ARM GAS /tmp/cchYLLnp.s page 5
ARM GAS /tmp/cc3g0pRE.s page 5
29 .loc 1 201 1 view -0
@ -298,7 +298,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
61 .loc 1 220 1 view .LVU8
62 0006 70B5 push {r4, r5, r6, lr}
63 .LCFI0:
ARM GAS /tmp/cchYLLnp.s page 6
ARM GAS /tmp/cc3g0pRE.s page 6
64 .cfi_def_cfa_offset 16
@ -358,7 +358,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/
ARM GAS /tmp/cchYLLnp.s page 7
ARM GAS /tmp/cc3g0pRE.s page 7
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
@ -418,7 +418,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
139 .loc 1 259 16 is_stmt 0 view .LVU36
140 0062 FFF7FEFF bl HAL_GetTick
141 .LVL3:
ARM GAS /tmp/cchYLLnp.s page 8
ARM GAS /tmp/cc3g0pRE.s page 8
142 .loc 1 259 30 discriminator 1 view .LVU37
@ -478,7 +478,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 9
ARM GAS /tmp/cc3g0pRE.s page 9
279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
@ -538,7 +538,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
197 .loc 1 307 29 is_stmt 0 view .LVU58
198 00aa E368 ldr r3, [r4, #12]
199 .loc 1 307 10 view .LVU59
ARM GAS /tmp/cchYLLnp.s page 10
ARM GAS /tmp/cc3g0pRE.s page 10
200 00ac 002B cmp r3, #0
@ -598,7 +598,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
240 00de B5E7 b .L8
241 .L81:
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/cchYLLnp.s page 11
ARM GAS /tmp/cc3g0pRE.s page 11
242 .loc 1 248 7 discriminator 4 view .LVU73
@ -658,7 +658,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
283 .loc 1 290 70 view .LVU87
284 0112 604B ldr r3, .L93
ARM GAS /tmp/cchYLLnp.s page 12
ARM GAS /tmp/cc3g0pRE.s page 12
285 0114 5B68 ldr r3, [r3, #4]
@ -718,7 +718,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 13
ARM GAS /tmp/cc3g0pRE.s page 13
345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
@ -778,7 +778,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
345 .LVL16:
346 .loc 1 364 28 discriminator 1 view .LVU111
347 0166 401B subs r0, r0, r5
ARM GAS /tmp/cchYLLnp.s page 14
ARM GAS /tmp/cc3g0pRE.s page 14
348 .loc 1 364 12 discriminator 1 view .LVU112
@ -838,7 +838,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
389 019c 401B subs r0, r0, r5
338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
390 .loc 1 338 14 discriminator 1 view .LVU125
ARM GAS /tmp/cchYLLnp.s page 15
ARM GAS /tmp/cc3g0pRE.s page 15
391 019e 0228 cmp r0, #2
@ -898,7 +898,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
427 01c8 0320 movs r0, #3
428 01ca 03E1 b .L3
429 .LVL25:
ARM GAS /tmp/cchYLLnp.s page 16
ARM GAS /tmp/cc3g0pRE.s page 16
430 .L24:
@ -958,7 +958,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
466 .loc 1 401 7 view .LVU153
467 .LVL27:
468 .loc 1 401 21 is_stmt 0 view .LVU154
ARM GAS /tmp/cchYLLnp.s page 17
ARM GAS /tmp/cc3g0pRE.s page 17
469 01f6 0125 movs r5, #1
@ -1018,7 +1018,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
500 .loc 1 424 27 is_stmt 0 view .LVU165
501 021e A368 ldr r3, [r4, #8]
502 .loc 1 424 8 view .LVU166
ARM GAS /tmp/cchYLLnp.s page 18
ARM GAS /tmp/cc3g0pRE.s page 18
503 0220 002B cmp r3, #0
@ -1078,7 +1078,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
545 .loc 1 410 7 view .LVU180
410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/cchYLLnp.s page 19
ARM GAS /tmp/cc3g0pRE.s page 19
546 .loc 1 410 19 is_stmt 0 view .LVU181
@ -1138,7 +1138,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
590 0292 00BF .align 2
591 .L93:
592 0294 00380240 .word 1073887232
ARM GAS /tmp/cchYLLnp.s page 20
ARM GAS /tmp/cc3g0pRE.s page 20
593 0298 00004742 .word 1111949312
@ -1198,7 +1198,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
627 02c2 EDB9 cbnz r5, .L88
628 .LVL41:
629 .L30:
ARM GAS /tmp/cchYLLnp.s page 21
ARM GAS /tmp/cc3g0pRE.s page 21
630 .loc 1 454 8 view .LVU205
@ -1258,7 +1258,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/cchYLLnp.s page 22
ARM GAS /tmp/cc3g0pRE.s page 22
491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */
@ -1318,7 +1318,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
672 02f2 FFF7FEFF bl HAL_GetTick
673 .LVL44:
674 .loc 1 523 30 discriminator 1 view .LVU224
ARM GAS /tmp/cchYLLnp.s page 23
ARM GAS /tmp/cc3g0pRE.s page 23
675 02f6 001B subs r0, r0, r4
@ -1378,7 +1378,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
714 0318 354B ldr r3, .L95
715 031a 1B68 ldr r3, [r3]
483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
ARM GAS /tmp/cchYLLnp.s page 24
ARM GAS /tmp/cc3g0pRE.s page 24
716 .loc 1 483 52 view .LVU240
@ -1438,7 +1438,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
759 .loc 1 504 16 is_stmt 0 view .LVU252
760 035c 244B ldr r3, .L95
ARM GAS /tmp/cchYLLnp.s page 25
ARM GAS /tmp/cc3g0pRE.s page 25
761 035e 1B68 ldr r3, [r3]
@ -1498,7 +1498,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR;
559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 26
ARM GAS /tmp/cc3g0pRE.s page 26
560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
@ -1558,7 +1558,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
815 039e 1A40 ands r2, r2, r3
816 03a0 B2EB811F cmp r2, r1, lsl #6
817 03a4 1ED1 bne .L72
ARM GAS /tmp/cchYLLnp.s page 27
ARM GAS /tmp/cc3g0pRE.s page 27
554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_
@ -1618,7 +1618,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
861 .loc 1 242 16 view .LVU285
862 03ca 0120 movs r0, #1
863 .LVL59:
ARM GAS /tmp/cchYLLnp.s page 28
ARM GAS /tmp/cc3g0pRE.s page 28
242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
@ -1678,7 +1678,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
912 03f4 00004742 .word 1111949312
913 .cfi_endproc
914 .LFE240:
ARM GAS /tmp/cchYLLnp.s page 29
ARM GAS /tmp/cc3g0pRE.s page 29
916 .section .text.HAL_RCC_MCOConfig,"ax",%progbits
@ -1738,7 +1738,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (FLatency > __HAL_FLASH_GET_LATENCY())
611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
ARM GAS /tmp/cchYLLnp.s page 30
ARM GAS /tmp/cc3g0pRE.s page 30
613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
@ -1798,7 +1798,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else
668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */
ARM GAS /tmp/cchYLLnp.s page 31
ARM GAS /tmp/cc3g0pRE.s page 31
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
@ -1858,7 +1858,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK;
725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
ARM GAS /tmp/cchYLLnp.s page 32
ARM GAS /tmp/cc3g0pRE.s page 32
727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /**
@ -1918,7 +1918,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
930 .loc 1 776 1 is_stmt 0 view .LVU294
931 0000 70B5 push {r4, r5, r6, lr}
932 .LCFI6:
ARM GAS /tmp/cchYLLnp.s page 33
ARM GAS /tmp/cc3g0pRE.s page 33
933 .cfi_def_cfa_offset 16
@ -1978,7 +1978,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
973 0026 0392 str r2, [sp, #12]
791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
974 .loc 1 791 5 is_stmt 1 view .LVU310
ARM GAS /tmp/cchYLLnp.s page 34
ARM GAS /tmp/cc3g0pRE.s page 34
975 .loc 1 791 26 is_stmt 0 view .LVU311
@ -2038,7 +2038,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN;
815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
ARM GAS /tmp/cchYLLnp.s page 35
ARM GAS /tmp/cc3g0pRE.s page 35
817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -2098,7 +2098,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1039 .loc 1 814 5 view .LVU332
814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
ARM GAS /tmp/cchYLLnp.s page 36
ARM GAS /tmp/cc3g0pRE.s page 36
1040 .loc 1 814 25 is_stmt 0 view .LVU333
@ -2158,7 +2158,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1081 0098 00080240 .word 1073874944
1082 .cfi_endproc
1083 .LFE242:
ARM GAS /tmp/cchYLLnp.s page 37
ARM GAS /tmp/cc3g0pRE.s page 37
1085 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
@ -2218,7 +2218,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1122 .loc 1 851 1 is_stmt 1 view -0
1123 .cfi_startproc
ARM GAS /tmp/cchYLLnp.s page 38
ARM GAS /tmp/cc3g0pRE.s page 38
1124 @ args = 0, pretend = 0, frame = 0
@ -2278,7 +2278,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *
883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency
ARM GAS /tmp/cchYLLnp.s page 39
ARM GAS /tmp/cc3g0pRE.s page 39
884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */
@ -2338,7 +2338,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1179 0014 5A68 ldr r2, [r3, #4]
1180 .loc 1 909 12 view .LVU367
1181 0016 02F03F02 and r2, r2, #63
ARM GAS /tmp/cchYLLnp.s page 40
ARM GAS /tmp/cc3g0pRE.s page 40
1182 .LVL78:
@ -2398,7 +2398,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1225 .loc 1 920 12 view .LVU380
1226 0074 5B00 lsls r3, r3, #1
1227 .LVL80:
ARM GAS /tmp/cchYLLnp.s page 41
ARM GAS /tmp/cc3g0pRE.s page 41
921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
@ -2458,7 +2458,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1265 .loc 1 918 128 view .LVU390
1266 00c4 D1E7 b .L112
ARM GAS /tmp/cchYLLnp.s page 42
ARM GAS /tmp/cc3g0pRE.s page 42
1267 .LVL84:
@ -2518,7 +2518,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1314 .cfi_offset 14, -4
1315 0008 0D46 mov r5, r1
1316 000a 0446 mov r4, r0
ARM GAS /tmp/cchYLLnp.s page 43
ARM GAS /tmp/cc3g0pRE.s page 43
602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
@ -2578,7 +2578,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1355 .loc 1 633 5 view .LVU415
633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1356 .loc 1 633 28 is_stmt 0 view .LVU416
ARM GAS /tmp/cchYLLnp.s page 44
ARM GAS /tmp/cc3g0pRE.s page 44
1357 0042 2368 ldr r3, [r4]
@ -2638,7 +2638,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1396 0074 25D9 bls .L145
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1397 .loc 1 670 7 is_stmt 1 view .LVU432
ARM GAS /tmp/cchYLLnp.s page 45
ARM GAS /tmp/cc3g0pRE.s page 45
670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
@ -2698,7 +2698,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1437 00a8 41F28833 movw r3, #5000
1438 00ac 9842 cmp r0, r3
1439 00ae F0D9 bls .L128
ARM GAS /tmp/cchYLLnp.s page 46
ARM GAS /tmp/cc3g0pRE.s page 46
685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
@ -2758,7 +2758,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1480 .loc 1 694 5 is_stmt 1 view .LVU462
1481 00dc EAB2 uxtb r2, r5
ARM GAS /tmp/cchYLLnp.s page 47
ARM GAS /tmp/cc3g0pRE.s page 47
1482 00de 1B4B ldr r3, .L146
@ -2818,7 +2818,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1522 .loc 1 719 3 view .LVU476
719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1523 .loc 1 719 21 is_stmt 0 view .LVU477
ARM GAS /tmp/cchYLLnp.s page 48
ARM GAS /tmp/cc3g0pRE.s page 48
1524 011a FFF7FEFF bl HAL_RCC_GetSysClockFreq
@ -2878,7 +2878,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1567 .cfi_offset 4, -16
1568 .cfi_offset 5, -12
1569 .cfi_offset 6, -8
ARM GAS /tmp/cchYLLnp.s page 49
ARM GAS /tmp/cc3g0pRE.s page 49
1570 .cfi_offset 14, -4
@ -2938,7 +2938,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1609 @ args = 0, pretend = 0, frame = 0
1610 @ frame_needed = 0, uses_anonymous_args = 0
1611 @ link register save eliminated.
ARM GAS /tmp/cchYLLnp.s page 50
ARM GAS /tmp/cc3g0pRE.s page 50
945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock;
@ -2998,7 +2998,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1654 .loc 1 958 1 view .LVU503
1655 0012 D840 lsrs r0, r0, r3
1656 0014 08BD pop {r3, pc}
ARM GAS /tmp/cchYLLnp.s page 51
ARM GAS /tmp/cc3g0pRE.s page 51
1657 .L154:
@ -3058,7 +3058,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1701 0018 00380240 .word 1073887232
1702 001c 00000000 .word APBPrescTable
1703 .cfi_endproc
ARM GAS /tmp/cchYLLnp.s page 52
ARM GAS /tmp/cc3g0pRE.s page 52
1704 .LFE248:
@ -3118,7 +3118,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 53
ARM GAS /tmp/cc3g0pRE.s page 53
997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
@ -3178,7 +3178,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 54
ARM GAS /tmp/cc3g0pRE.s page 54
1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
@ -3238,7 +3238,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1800 .loc 1 1044 3 is_stmt 1 view .LVU547
1801 .loc 1 1044 47 is_stmt 0 view .LVU548
1802 005e 5368 ldr r3, [r2, #4]
ARM GAS /tmp/cchYLLnp.s page 55
ARM GAS /tmp/cc3g0pRE.s page 55
1803 .loc 1 1044 33 view .LVU549
@ -3298,7 +3298,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
1848 .loc 1 995 5 is_stmt 1 view .LVU571
995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** }
ARM GAS /tmp/cchYLLnp.s page 56
ARM GAS /tmp/cc3g0pRE.s page 56
1849 .loc 1 995 33 is_stmt 0 view .LVU572
@ -3358,7 +3358,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1890 .L173:
1891 00c6 00BF .align 2
1892 .L172:
ARM GAS /tmp/cchYLLnp.s page 57
ARM GAS /tmp/cc3g0pRE.s page 57
1893 00c8 00380240 .word 1073887232
@ -3418,7 +3418,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1930 0014 8260 str r2, [r0, #8]
1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c ****
1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/
ARM GAS /tmp/cchYLLnp.s page 58
ARM GAS /tmp/cc3g0pRE.s page 58
1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
@ -3478,7 +3478,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
1084:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** {
1086:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */
ARM GAS /tmp/cchYLLnp.s page 59
ARM GAS /tmp/cc3g0pRE.s page 59
1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_IT(RCC_IT_CSS))
@ -3538,7 +3538,7 @@ ARM GAS /tmp/cchYLLnp.s page 1
2005 .loc 1 1087 6 view .LVU615
2006 0006 13F0800F tst r3, #128
2007 000a 00D1 bne .L181
ARM GAS /tmp/cchYLLnp.s page 60
ARM GAS /tmp/cc3g0pRE.s page 60
2008 .L178:
@ -3575,53 +3575,53 @@ ARM GAS /tmp/cchYLLnp.s page 1
2036 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h"
2037 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
2038 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS /tmp/cchYLLnp.s page 61
ARM GAS /tmp/cc3g0pRE.s page 61
DEFINED SYMBOLS
*ABS*:00000000 stm32f4xx_hal_rcc.c
/tmp/cchYLLnp.s:21 .text.HAL_RCC_DeInit:00000000 $t
/tmp/cchYLLnp.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
/tmp/cchYLLnp.s:42 .text.HAL_RCC_OscConfig:00000000 $t
/tmp/cchYLLnp.s:48 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
/tmp/cchYLLnp.s:592 .text.HAL_RCC_OscConfig:00000294 $d
/tmp/cchYLLnp.s:598 .text.HAL_RCC_OscConfig:000002a0 $t
/tmp/cchYLLnp.s:911 .text.HAL_RCC_OscConfig:000003f0 $d
/tmp/cchYLLnp.s:917 .text.HAL_RCC_MCOConfig:00000000 $t
/tmp/cchYLLnp.s:923 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
/tmp/cchYLLnp.s:1079 .text.HAL_RCC_MCOConfig:00000090 $d
/tmp/cchYLLnp.s:1086 .text.HAL_RCC_EnableCSS:00000000 $t
/tmp/cchYLLnp.s:1092 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
/tmp/cchYLLnp.s:1109 .text.HAL_RCC_EnableCSS:00000008 $d
/tmp/cchYLLnp.s:1114 .text.HAL_RCC_DisableCSS:00000000 $t
/tmp/cchYLLnp.s:1120 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
/tmp/cchYLLnp.s:1137 .text.HAL_RCC_DisableCSS:00000008 $d
/tmp/cchYLLnp.s:1143 .text.HAL_RCC_GetSysClockFreq:00000000 $t
/tmp/cchYLLnp.s:1149 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
/tmp/cchYLLnp.s:1282 .text.HAL_RCC_GetSysClockFreq:000000d0 $d
/tmp/cchYLLnp.s:1289 .text.HAL_RCC_ClockConfig:00000000 $t
/tmp/cchYLLnp.s:1295 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
/tmp/cchYLLnp.s:1590 .text.HAL_RCC_ClockConfig:0000014c $d
/tmp/cchYLLnp.s:1599 .text.HAL_RCC_GetHCLKFreq:00000000 $t
/tmp/cchYLLnp.s:1605 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
/tmp/cchYLLnp.s:1620 .text.HAL_RCC_GetHCLKFreq:00000008 $d
/tmp/cchYLLnp.s:1625 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
/tmp/cchYLLnp.s:1631 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
/tmp/cchYLLnp.s:1660 .text.HAL_RCC_GetPCLK1Freq:00000018 $d
/tmp/cchYLLnp.s:1666 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
/tmp/cchYLLnp.s:1672 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
/tmp/cchYLLnp.s:1701 .text.HAL_RCC_GetPCLK2Freq:00000018 $d
/tmp/cchYLLnp.s:1707 .text.HAL_RCC_GetOscConfig:00000000 $t
/tmp/cchYLLnp.s:1713 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
/tmp/cchYLLnp.s:1893 .text.HAL_RCC_GetOscConfig:000000c8 $d
/tmp/cchYLLnp.s:1898 .text.HAL_RCC_GetClockConfig:00000000 $t
/tmp/cchYLLnp.s:1904 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
/tmp/cchYLLnp.s:1959 .text.HAL_RCC_GetClockConfig:00000034 $d
/tmp/cchYLLnp.s:1965 .text.HAL_RCC_CSSCallback:00000000 $t
/tmp/cchYLLnp.s:1971 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
/tmp/cchYLLnp.s:1984 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
/tmp/cchYLLnp.s:1990 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
/tmp/cchYLLnp.s:2024 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
/tmp/cc3g0pRE.s:21 .text.HAL_RCC_DeInit:00000000 $t
/tmp/cc3g0pRE.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
/tmp/cc3g0pRE.s:42 .text.HAL_RCC_OscConfig:00000000 $t
/tmp/cc3g0pRE.s:48 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
/tmp/cc3g0pRE.s:592 .text.HAL_RCC_OscConfig:00000294 $d
/tmp/cc3g0pRE.s:598 .text.HAL_RCC_OscConfig:000002a0 $t
/tmp/cc3g0pRE.s:911 .text.HAL_RCC_OscConfig:000003f0 $d
/tmp/cc3g0pRE.s:917 .text.HAL_RCC_MCOConfig:00000000 $t
/tmp/cc3g0pRE.s:923 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
/tmp/cc3g0pRE.s:1079 .text.HAL_RCC_MCOConfig:00000090 $d
/tmp/cc3g0pRE.s:1086 .text.HAL_RCC_EnableCSS:00000000 $t
/tmp/cc3g0pRE.s:1092 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
/tmp/cc3g0pRE.s:1109 .text.HAL_RCC_EnableCSS:00000008 $d
/tmp/cc3g0pRE.s:1114 .text.HAL_RCC_DisableCSS:00000000 $t
/tmp/cc3g0pRE.s:1120 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
/tmp/cc3g0pRE.s:1137 .text.HAL_RCC_DisableCSS:00000008 $d
/tmp/cc3g0pRE.s:1143 .text.HAL_RCC_GetSysClockFreq:00000000 $t
/tmp/cc3g0pRE.s:1149 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
/tmp/cc3g0pRE.s:1282 .text.HAL_RCC_GetSysClockFreq:000000d0 $d
/tmp/cc3g0pRE.s:1289 .text.HAL_RCC_ClockConfig:00000000 $t
/tmp/cc3g0pRE.s:1295 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
/tmp/cc3g0pRE.s:1590 .text.HAL_RCC_ClockConfig:0000014c $d
/tmp/cc3g0pRE.s:1599 .text.HAL_RCC_GetHCLKFreq:00000000 $t
/tmp/cc3g0pRE.s:1605 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
/tmp/cc3g0pRE.s:1620 .text.HAL_RCC_GetHCLKFreq:00000008 $d
/tmp/cc3g0pRE.s:1625 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
/tmp/cc3g0pRE.s:1631 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
/tmp/cc3g0pRE.s:1660 .text.HAL_RCC_GetPCLK1Freq:00000018 $d
/tmp/cc3g0pRE.s:1666 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
/tmp/cc3g0pRE.s:1672 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
/tmp/cc3g0pRE.s:1701 .text.HAL_RCC_GetPCLK2Freq:00000018 $d
/tmp/cc3g0pRE.s:1707 .text.HAL_RCC_GetOscConfig:00000000 $t
/tmp/cc3g0pRE.s:1713 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
/tmp/cc3g0pRE.s:1893 .text.HAL_RCC_GetOscConfig:000000c8 $d
/tmp/cc3g0pRE.s:1898 .text.HAL_RCC_GetClockConfig:00000000 $t
/tmp/cc3g0pRE.s:1904 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
/tmp/cc3g0pRE.s:1959 .text.HAL_RCC_GetClockConfig:00000034 $d
/tmp/cc3g0pRE.s:1965 .text.HAL_RCC_CSSCallback:00000000 $t
/tmp/cc3g0pRE.s:1971 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
/tmp/cc3g0pRE.s:1984 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
/tmp/cc3g0pRE.s:1990 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
/tmp/cc3g0pRE.s:2024 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
UNDEFINED SYMBOLS
HAL_GetTick