implemented sweep and current steps processing. But not compiles
This commit is contained in:
@ -1,4 +1,4 @@
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ARM GAS /tmp/ccAF09Kg.s page 1
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ARM GAS /tmp/ccgREgit.s page 1
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1 .cpu cortex-m4
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@ -58,7 +58,7 @@ ARM GAS /tmp/ccAF09Kg.s page 1
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28:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
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29:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */
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30:Core/Src/stm32f4xx_hal_msp.c ****
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ARM GAS /tmp/ccAF09Kg.s page 2
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ARM GAS /tmp/ccgREgit.s page 2
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31:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */
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@ -118,7 +118,7 @@ ARM GAS /tmp/ccAF09Kg.s page 1
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42 .loc 1 71 3 view .LVU3
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43 0006 0B4B ldr r3, .L3
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44 0008 5A6C ldr r2, [r3, #68]
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ARM GAS /tmp/ccAF09Kg.s page 3
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ARM GAS /tmp/ccgREgit.s page 3
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45 000a 42F48042 orr r2, r2, #16384
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@ -178,7 +178,7 @@ ARM GAS /tmp/ccAF09Kg.s page 1
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93 .LFB240:
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80:Core/Src/stm32f4xx_hal_msp.c ****
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81:Core/Src/stm32f4xx_hal_msp.c **** /**
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ARM GAS /tmp/ccAF09Kg.s page 4
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ARM GAS /tmp/ccgREgit.s page 4
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82:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP Initialization
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@ -193,36 +193,35 @@ ARM GAS /tmp/ccAF09Kg.s page 1
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96 @ args = 0, pretend = 0, frame = 32
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97 @ frame_needed = 0, uses_anonymous_args = 0
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98 .loc 1 88 1 is_stmt 0 view .LVU15
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99 0000 70B5 push {r4, r5, r6, lr}
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99 0000 30B5 push {r4, r5, lr}
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100 .LCFI2:
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101 .cfi_def_cfa_offset 16
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102 .cfi_offset 4, -16
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103 .cfi_offset 5, -12
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104 .cfi_offset 6, -8
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105 .cfi_offset 14, -4
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106 0002 88B0 sub sp, sp, #32
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107 .LCFI3:
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108 .cfi_def_cfa_offset 48
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101 .cfi_def_cfa_offset 12
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102 .cfi_offset 4, -12
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103 .cfi_offset 5, -8
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104 .cfi_offset 14, -4
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105 0002 89B0 sub sp, sp, #36
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106 .LCFI3:
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107 .cfi_def_cfa_offset 48
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89:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
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109 .loc 1 89 3 is_stmt 1 view .LVU16
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110 .loc 1 89 20 is_stmt 0 view .LVU17
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111 0004 0023 movs r3, #0
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112 0006 0393 str r3, [sp, #12]
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113 0008 0493 str r3, [sp, #16]
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114 000a 0593 str r3, [sp, #20]
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115 000c 0693 str r3, [sp, #24]
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116 000e 0793 str r3, [sp, #28]
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108 .loc 1 89 3 is_stmt 1 view .LVU16
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109 .loc 1 89 20 is_stmt 0 view .LVU17
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110 0004 0023 movs r3, #0
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111 0006 0393 str r3, [sp, #12]
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112 0008 0493 str r3, [sp, #16]
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113 000a 0593 str r3, [sp, #20]
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114 000c 0693 str r3, [sp, #24]
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115 000e 0793 str r3, [sp, #28]
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90:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1)
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117 .loc 1 90 3 is_stmt 1 view .LVU18
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118 .loc 1 90 10 is_stmt 0 view .LVU19
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119 0010 0268 ldr r2, [r0]
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120 .loc 1 90 5 view .LVU20
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121 0012 03F18043 add r3, r3, #1073741824
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122 0016 03F59033 add r3, r3, #73728
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123 001a 9A42 cmp r2, r3
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124 001c 01D0 beq .L9
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125 .LVL1:
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126 .L5:
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116 .loc 1 90 3 is_stmt 1 view .LVU18
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117 .loc 1 90 10 is_stmt 0 view .LVU19
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||||
118 0010 0268 ldr r2, [r0]
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119 .loc 1 90 5 view .LVU20
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120 0012 03F18043 add r3, r3, #1073741824
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||||
121 0016 03F59033 add r3, r3, #73728
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||||
122 001a 9A42 cmp r2, r3
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||||
123 001c 01D0 beq .L9
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||||
124 .LVL1:
|
||||
125 .L5:
|
||||
91:Core/Src/stm32f4xx_hal_msp.c **** {
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92:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
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93:Core/Src/stm32f4xx_hal_msp.c ****
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@ -230,410 +229,353 @@ ARM GAS /tmp/ccAF09Kg.s page 1
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95:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */
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96:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE();
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97:Core/Src/stm32f4xx_hal_msp.c ****
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98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
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99:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
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100:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
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101:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10
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102:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3
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103:Core/Src/stm32f4xx_hal_msp.c **** */
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104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0;
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105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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ARM GAS /tmp/ccAF09Kg.s page 5
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106:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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107:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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108:Core/Src/stm32f4xx_hal_msp.c ****
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109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3;
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110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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111:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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112:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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113:Core/Src/stm32f4xx_hal_msp.c ****
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114:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA Init */
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115:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 Init */
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116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Instance = DMA2_Stream0;
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117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
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118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
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119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
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120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
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121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
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122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
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123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
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124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
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125:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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126:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
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127:Core/Src/stm32f4xx_hal_msp.c **** {
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||||
128:Core/Src/stm32f4xx_hal_msp.c **** Error_Handler();
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129:Core/Src/stm32f4xx_hal_msp.c **** }
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130:Core/Src/stm32f4xx_hal_msp.c ****
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131:Core/Src/stm32f4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
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132:Core/Src/stm32f4xx_hal_msp.c ****
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133:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
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134:Core/Src/stm32f4xx_hal_msp.c ****
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135:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
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136:Core/Src/stm32f4xx_hal_msp.c ****
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137:Core/Src/stm32f4xx_hal_msp.c **** }
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||||
138:Core/Src/stm32f4xx_hal_msp.c ****
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||||
139:Core/Src/stm32f4xx_hal_msp.c **** }
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||||
127 .loc 1 139 1 view .LVU21
|
||||
128 001e 08B0 add sp, sp, #32
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129 .LCFI4:
|
||||
130 .cfi_remember_state
|
||||
131 .cfi_def_cfa_offset 16
|
||||
132 @ sp needed
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||||
133 0020 70BD pop {r4, r5, r6, pc}
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134 .LVL2:
|
||||
135 .L9:
|
||||
136 .LCFI5:
|
||||
137 .cfi_restore_state
|
||||
138 .loc 1 139 1 view .LVU22
|
||||
139 0022 0446 mov r4, r0
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96:Core/Src/stm32f4xx_hal_msp.c ****
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||||
140 .loc 1 96 5 is_stmt 1 view .LVU23
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||||
141 .LBB4:
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||||
96:Core/Src/stm32f4xx_hal_msp.c ****
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||||
142 .loc 1 96 5 view .LVU24
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||||
143 0024 0025 movs r5, #0
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||||
144 0026 0095 str r5, [sp]
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||||
96:Core/Src/stm32f4xx_hal_msp.c ****
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||||
145 .loc 1 96 5 view .LVU25
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||||
146 0028 03F58C33 add r3, r3, #71680
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||||
ARM GAS /tmp/ccAF09Kg.s page 6
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||||
|
||||
|
||||
147 002c 5A6C ldr r2, [r3, #68]
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||||
148 002e 42F48072 orr r2, r2, #256
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||||
149 0032 5A64 str r2, [r3, #68]
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||||
96:Core/Src/stm32f4xx_hal_msp.c ****
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||||
150 .loc 1 96 5 view .LVU26
|
||||
151 0034 5A6C ldr r2, [r3, #68]
|
||||
152 0036 02F48072 and r2, r2, #256
|
||||
153 003a 0092 str r2, [sp]
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
154 .loc 1 96 5 view .LVU27
|
||||
155 003c 009A ldr r2, [sp]
|
||||
156 .LBE4:
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
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||||
157 .loc 1 96 5 view .LVU28
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
158 .loc 1 98 5 view .LVU29
|
||||
159 .LBB5:
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
160 .loc 1 98 5 view .LVU30
|
||||
161 003e 0195 str r5, [sp, #4]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
162 .loc 1 98 5 view .LVU31
|
||||
163 0040 1A6B ldr r2, [r3, #48]
|
||||
164 0042 42F00402 orr r2, r2, #4
|
||||
165 0046 1A63 str r2, [r3, #48]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
166 .loc 1 98 5 view .LVU32
|
||||
167 0048 1A6B ldr r2, [r3, #48]
|
||||
168 004a 02F00402 and r2, r2, #4
|
||||
169 004e 0192 str r2, [sp, #4]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
170 .loc 1 98 5 view .LVU33
|
||||
171 0050 019A ldr r2, [sp, #4]
|
||||
172 .LBE5:
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
173 .loc 1 98 5 view .LVU34
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
174 .loc 1 99 5 view .LVU35
|
||||
175 .LBB6:
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
176 .loc 1 99 5 view .LVU36
|
||||
177 0052 0295 str r5, [sp, #8]
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
178 .loc 1 99 5 view .LVU37
|
||||
179 0054 1A6B ldr r2, [r3, #48]
|
||||
180 0056 42F00102 orr r2, r2, #1
|
||||
181 005a 1A63 str r2, [r3, #48]
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
182 .loc 1 99 5 view .LVU38
|
||||
183 005c 1B6B ldr r3, [r3, #48]
|
||||
184 005e 03F00103 and r3, r3, #1
|
||||
185 0062 0293 str r3, [sp, #8]
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
186 .loc 1 99 5 view .LVU39
|
||||
187 0064 029B ldr r3, [sp, #8]
|
||||
188 .LBE6:
|
||||
99:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
ARM GAS /tmp/ccAF09Kg.s page 7
|
||||
100:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3
|
||||
101:Core/Src/stm32f4xx_hal_msp.c **** */
|
||||
102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
105:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
106:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
ARM GAS /tmp/ccgREgit.s page 5
|
||||
|
||||
|
||||
189 .loc 1 99 5 view .LVU40
|
||||
104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
190 .loc 1 104 5 view .LVU41
|
||||
104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
191 .loc 1 104 25 is_stmt 0 view .LVU42
|
||||
192 0066 0123 movs r3, #1
|
||||
193 0068 0393 str r3, [sp, #12]
|
||||
105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
194 .loc 1 105 5 is_stmt 1 view .LVU43
|
||||
105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
195 .loc 1 105 26 is_stmt 0 view .LVU44
|
||||
196 006a 0326 movs r6, #3
|
||||
197 006c 0496 str r6, [sp, #16]
|
||||
106:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
198 .loc 1 106 5 is_stmt 1 view .LVU45
|
||||
107:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
199 .loc 1 107 5 view .LVU46
|
||||
200 006e 03A9 add r1, sp, #12
|
||||
201 0070 1448 ldr r0, .L11
|
||||
202 .LVL3:
|
||||
107:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
203 .loc 1 107 5 is_stmt 0 view .LVU47
|
||||
204 0072 FFF7FEFF bl HAL_GPIO_Init
|
||||
205 .LVL4:
|
||||
109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
206 .loc 1 109 5 is_stmt 1 view .LVU48
|
||||
109:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
207 .loc 1 109 25 is_stmt 0 view .LVU49
|
||||
208 0076 0823 movs r3, #8
|
||||
209 0078 0393 str r3, [sp, #12]
|
||||
110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
210 .loc 1 110 5 is_stmt 1 view .LVU50
|
||||
110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
211 .loc 1 110 26 is_stmt 0 view .LVU51
|
||||
212 007a 0496 str r6, [sp, #16]
|
||||
111:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
213 .loc 1 111 5 is_stmt 1 view .LVU52
|
||||
111:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
214 .loc 1 111 26 is_stmt 0 view .LVU53
|
||||
215 007c 0595 str r5, [sp, #20]
|
||||
112:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
216 .loc 1 112 5 is_stmt 1 view .LVU54
|
||||
217 007e 03A9 add r1, sp, #12
|
||||
218 0080 1148 ldr r0, .L11+4
|
||||
219 0082 FFF7FEFF bl HAL_GPIO_Init
|
||||
220 .LVL5:
|
||||
116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
221 .loc 1 116 5 view .LVU55
|
||||
116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
222 .loc 1 116 24 is_stmt 0 view .LVU56
|
||||
223 0086 1148 ldr r0, .L11+8
|
||||
224 0088 114B ldr r3, .L11+12
|
||||
225 008a 0360 str r3, [r0]
|
||||
117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
226 .loc 1 117 5 is_stmt 1 view .LVU57
|
||||
117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
227 .loc 1 117 28 is_stmt 0 view .LVU58
|
||||
ARM GAS /tmp/ccAF09Kg.s page 8
|
||||
|
||||
|
||||
228 008c 4560 str r5, [r0, #4]
|
||||
118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
229 .loc 1 118 5 is_stmt 1 view .LVU59
|
||||
118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
230 .loc 1 118 30 is_stmt 0 view .LVU60
|
||||
231 008e 8560 str r5, [r0, #8]
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
232 .loc 1 119 5 is_stmt 1 view .LVU61
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
233 .loc 1 119 30 is_stmt 0 view .LVU62
|
||||
234 0090 C560 str r5, [r0, #12]
|
||||
120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
235 .loc 1 120 5 is_stmt 1 view .LVU63
|
||||
120:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
236 .loc 1 120 27 is_stmt 0 view .LVU64
|
||||
237 0092 4FF48063 mov r3, #1024
|
||||
238 0096 0361 str r3, [r0, #16]
|
||||
121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
239 .loc 1 121 5 is_stmt 1 view .LVU65
|
||||
121:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
240 .loc 1 121 40 is_stmt 0 view .LVU66
|
||||
241 0098 4FF40063 mov r3, #2048
|
||||
242 009c 4361 str r3, [r0, #20]
|
||||
122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||
243 .loc 1 122 5 is_stmt 1 view .LVU67
|
||||
122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||
244 .loc 1 122 37 is_stmt 0 view .LVU68
|
||||
245 009e 4FF40053 mov r3, #8192
|
||||
246 00a2 8361 str r3, [r0, #24]
|
||||
123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
247 .loc 1 123 5 is_stmt 1 view .LVU69
|
||||
123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
248 .loc 1 123 25 is_stmt 0 view .LVU70
|
||||
249 00a4 4FF48073 mov r3, #256
|
||||
250 00a8 C361 str r3, [r0, #28]
|
||||
124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
251 .loc 1 124 5 is_stmt 1 view .LVU71
|
||||
124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
252 .loc 1 124 29 is_stmt 0 view .LVU72
|
||||
253 00aa 0562 str r5, [r0, #32]
|
||||
125:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
254 .loc 1 125 5 is_stmt 1 view .LVU73
|
||||
125:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
255 .loc 1 125 29 is_stmt 0 view .LVU74
|
||||
256 00ac 4562 str r5, [r0, #36]
|
||||
126:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
257 .loc 1 126 5 is_stmt 1 view .LVU75
|
||||
126:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
258 .loc 1 126 9 is_stmt 0 view .LVU76
|
||||
259 00ae FFF7FEFF bl HAL_DMA_Init
|
||||
260 .LVL6:
|
||||
126:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
261 .loc 1 126 8 discriminator 1 view .LVU77
|
||||
262 00b2 18B9 cbnz r0, .L10
|
||||
263 .L7:
|
||||
107:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA Init */
|
||||
108:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 Init */
|
||||
109:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Instance = DMA2_Stream0;
|
||||
110:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
111:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
112:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
113:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
114:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
115:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||
117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
118:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
120:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
121:Core/Src/stm32f4xx_hal_msp.c **** Error_Handler();
|
||||
122:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
123:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
124:Core/Src/stm32f4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
|
||||
125:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
126:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
127:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
128:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
|
||||
129:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
130:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
131:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
264 .loc 1 131 5 is_stmt 1 view .LVU78
|
||||
ARM GAS /tmp/ccAF09Kg.s page 9
|
||||
132:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
126 .loc 1 132 1 view .LVU21
|
||||
127 001e 09B0 add sp, sp, #36
|
||||
128 .LCFI4:
|
||||
129 .cfi_remember_state
|
||||
130 .cfi_def_cfa_offset 12
|
||||
131 @ sp needed
|
||||
132 0020 30BD pop {r4, r5, pc}
|
||||
133 .LVL2:
|
||||
134 .L9:
|
||||
135 .LCFI5:
|
||||
136 .cfi_restore_state
|
||||
137 .loc 1 132 1 view .LVU22
|
||||
138 0022 0446 mov r4, r0
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
139 .loc 1 96 5 is_stmt 1 view .LVU23
|
||||
140 .LBB4:
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
141 .loc 1 96 5 view .LVU24
|
||||
142 0024 0025 movs r5, #0
|
||||
143 0026 0195 str r5, [sp, #4]
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
144 .loc 1 96 5 view .LVU25
|
||||
145 0028 03F58C33 add r3, r3, #71680
|
||||
146 002c 5A6C ldr r2, [r3, #68]
|
||||
147 002e 42F48072 orr r2, r2, #256
|
||||
148 0032 5A64 str r2, [r3, #68]
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
149 .loc 1 96 5 view .LVU26
|
||||
150 0034 5A6C ldr r2, [r3, #68]
|
||||
151 0036 02F48072 and r2, r2, #256
|
||||
152 003a 0192 str r2, [sp, #4]
|
||||
ARM GAS /tmp/ccgREgit.s page 6
|
||||
|
||||
|
||||
131:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
265 .loc 1 131 5 view .LVU79
|
||||
266 00b4 054B ldr r3, .L11+8
|
||||
267 00b6 A363 str r3, [r4, #56]
|
||||
131:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
268 .loc 1 131 5 view .LVU80
|
||||
269 00b8 9C63 str r4, [r3, #56]
|
||||
131:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
270 .loc 1 131 5 discriminator 1 view .LVU81
|
||||
271 .loc 1 139 1 is_stmt 0 view .LVU82
|
||||
272 00ba B0E7 b .L5
|
||||
273 .L10:
|
||||
128:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
274 .loc 1 128 7 is_stmt 1 view .LVU83
|
||||
275 00bc FFF7FEFF bl Error_Handler
|
||||
276 .LVL7:
|
||||
277 00c0 F8E7 b .L7
|
||||
278 .L12:
|
||||
279 00c2 00BF .align 2
|
||||
280 .L11:
|
||||
281 00c4 00080240 .word 1073874944
|
||||
282 00c8 00000240 .word 1073872896
|
||||
283 00cc 00000000 .word hdma_adc1
|
||||
284 00d0 10640240 .word 1073898512
|
||||
285 .cfi_endproc
|
||||
286 .LFE240:
|
||||
288 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
|
||||
289 .align 1
|
||||
290 .global HAL_ADC_MspDeInit
|
||||
291 .syntax unified
|
||||
292 .thumb
|
||||
293 .thumb_func
|
||||
295 HAL_ADC_MspDeInit:
|
||||
296 .LVL8:
|
||||
297 .LFB241:
|
||||
140:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
141:Core/Src/stm32f4xx_hal_msp.c **** /**
|
||||
142:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
|
||||
143:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||||
144:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer
|
||||
145:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
|
||||
146:Core/Src/stm32f4xx_hal_msp.c **** */
|
||||
147:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||
148:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
298 .loc 1 148 1 view -0
|
||||
299 .cfi_startproc
|
||||
300 @ args = 0, pretend = 0, frame = 0
|
||||
301 @ frame_needed = 0, uses_anonymous_args = 0
|
||||
149:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1)
|
||||
302 .loc 1 149 3 view .LVU85
|
||||
303 .loc 1 149 10 is_stmt 0 view .LVU86
|
||||
304 0000 0268 ldr r2, [r0]
|
||||
305 .loc 1 149 5 view .LVU87
|
||||
306 0002 0B4B ldr r3, .L20
|
||||
307 0004 9A42 cmp r2, r3
|
||||
308 0006 00D0 beq .L19
|
||||
309 0008 7047 bx lr
|
||||
ARM GAS /tmp/ccAF09Kg.s page 10
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
153 .loc 1 96 5 view .LVU27
|
||||
154 003c 019A ldr r2, [sp, #4]
|
||||
155 .LBE4:
|
||||
96:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
156 .loc 1 96 5 view .LVU28
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
157 .loc 1 98 5 view .LVU29
|
||||
158 .LBB5:
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
159 .loc 1 98 5 view .LVU30
|
||||
160 003e 0295 str r5, [sp, #8]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
161 .loc 1 98 5 view .LVU31
|
||||
162 0040 1A6B ldr r2, [r3, #48]
|
||||
163 0042 42F00102 orr r2, r2, #1
|
||||
164 0046 1A63 str r2, [r3, #48]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
165 .loc 1 98 5 view .LVU32
|
||||
166 0048 1B6B ldr r3, [r3, #48]
|
||||
167 004a 03F00103 and r3, r3, #1
|
||||
168 004e 0293 str r3, [sp, #8]
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
169 .loc 1 98 5 view .LVU33
|
||||
170 0050 029B ldr r3, [sp, #8]
|
||||
171 .LBE5:
|
||||
98:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
172 .loc 1 98 5 view .LVU34
|
||||
102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
173 .loc 1 102 5 view .LVU35
|
||||
102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
174 .loc 1 102 25 is_stmt 0 view .LVU36
|
||||
175 0052 0823 movs r3, #8
|
||||
176 0054 0393 str r3, [sp, #12]
|
||||
103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
177 .loc 1 103 5 is_stmt 1 view .LVU37
|
||||
103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
178 .loc 1 103 26 is_stmt 0 view .LVU38
|
||||
179 0056 0323 movs r3, #3
|
||||
180 0058 0493 str r3, [sp, #16]
|
||||
104:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
181 .loc 1 104 5 is_stmt 1 view .LVU39
|
||||
105:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
182 .loc 1 105 5 view .LVU40
|
||||
183 005a 03A9 add r1, sp, #12
|
||||
184 005c 1048 ldr r0, .L11
|
||||
185 .LVL3:
|
||||
105:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
186 .loc 1 105 5 is_stmt 0 view .LVU41
|
||||
187 005e FFF7FEFF bl HAL_GPIO_Init
|
||||
188 .LVL4:
|
||||
109:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
189 .loc 1 109 5 is_stmt 1 view .LVU42
|
||||
109:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0;
|
||||
190 .loc 1 109 24 is_stmt 0 view .LVU43
|
||||
191 0062 1048 ldr r0, .L11+4
|
||||
192 0064 104B ldr r3, .L11+8
|
||||
ARM GAS /tmp/ccgREgit.s page 7
|
||||
|
||||
|
||||
310 .L19:
|
||||
148:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1)
|
||||
311 .loc 1 148 1 view .LVU88
|
||||
312 000a 10B5 push {r4, lr}
|
||||
313 .LCFI6:
|
||||
314 .cfi_def_cfa_offset 8
|
||||
315 .cfi_offset 4, -8
|
||||
316 .cfi_offset 14, -4
|
||||
317 000c 0446 mov r4, r0
|
||||
150:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
151:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||||
152:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
153:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
|
||||
154:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */
|
||||
155:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE();
|
||||
318 .loc 1 155 5 is_stmt 1 view .LVU89
|
||||
319 000e 094A ldr r2, .L20+4
|
||||
320 0010 536C ldr r3, [r2, #68]
|
||||
321 0012 23F48073 bic r3, r3, #256
|
||||
322 0016 5364 str r3, [r2, #68]
|
||||
156:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
157:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
158:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10
|
||||
159:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3
|
||||
160:Core/Src/stm32f4xx_hal_msp.c **** */
|
||||
161:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
|
||||
323 .loc 1 161 5 view .LVU90
|
||||
324 0018 0121 movs r1, #1
|
||||
325 001a 0748 ldr r0, .L20+8
|
||||
326 .LVL9:
|
||||
327 .loc 1 161 5 is_stmt 0 view .LVU91
|
||||
328 001c FFF7FEFF bl HAL_GPIO_DeInit
|
||||
329 .LVL10:
|
||||
162:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
163:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3);
|
||||
330 .loc 1 163 5 is_stmt 1 view .LVU92
|
||||
331 0020 0821 movs r1, #8
|
||||
332 0022 0648 ldr r0, .L20+12
|
||||
333 0024 FFF7FEFF bl HAL_GPIO_DeInit
|
||||
334 .LVL11:
|
||||
164:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
165:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA DeInit */
|
||||
166:Core/Src/stm32f4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle);
|
||||
335 .loc 1 166 5 view .LVU93
|
||||
336 0028 A06B ldr r0, [r4, #56]
|
||||
337 002a FFF7FEFF bl HAL_DMA_DeInit
|
||||
338 .LVL12:
|
||||
167:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
168:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
169:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
|
||||
170:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
171:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
172:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
339 .loc 1 172 1 is_stmt 0 view .LVU94
|
||||
340 002e 10BD pop {r4, pc}
|
||||
341 .LVL13:
|
||||
342 .L21:
|
||||
ARM GAS /tmp/ccAF09Kg.s page 11
|
||||
193 0066 0360 str r3, [r0]
|
||||
110:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
194 .loc 1 110 5 is_stmt 1 view .LVU44
|
||||
110:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
195 .loc 1 110 28 is_stmt 0 view .LVU45
|
||||
196 0068 4560 str r5, [r0, #4]
|
||||
111:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
197 .loc 1 111 5 is_stmt 1 view .LVU46
|
||||
111:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
198 .loc 1 111 30 is_stmt 0 view .LVU47
|
||||
199 006a 8560 str r5, [r0, #8]
|
||||
112:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
200 .loc 1 112 5 is_stmt 1 view .LVU48
|
||||
112:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
201 .loc 1 112 30 is_stmt 0 view .LVU49
|
||||
202 006c C560 str r5, [r0, #12]
|
||||
113:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
203 .loc 1 113 5 is_stmt 1 view .LVU50
|
||||
113:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
204 .loc 1 113 27 is_stmt 0 view .LVU51
|
||||
205 006e 4FF48063 mov r3, #1024
|
||||
206 0072 0361 str r3, [r0, #16]
|
||||
114:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
207 .loc 1 114 5 is_stmt 1 view .LVU52
|
||||
114:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
208 .loc 1 114 40 is_stmt 0 view .LVU53
|
||||
209 0074 4FF40063 mov r3, #2048
|
||||
210 0078 4361 str r3, [r0, #20]
|
||||
115:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||
211 .loc 1 115 5 is_stmt 1 view .LVU54
|
||||
115:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||
212 .loc 1 115 37 is_stmt 0 view .LVU55
|
||||
213 007a 4FF40053 mov r3, #8192
|
||||
214 007e 8361 str r3, [r0, #24]
|
||||
116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
215 .loc 1 116 5 is_stmt 1 view .LVU56
|
||||
116:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
216 .loc 1 116 25 is_stmt 0 view .LVU57
|
||||
217 0080 4FF48073 mov r3, #256
|
||||
218 0084 C361 str r3, [r0, #28]
|
||||
117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
219 .loc 1 117 5 is_stmt 1 view .LVU58
|
||||
117:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
220 .loc 1 117 29 is_stmt 0 view .LVU59
|
||||
221 0086 0562 str r5, [r0, #32]
|
||||
118:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
222 .loc 1 118 5 is_stmt 1 view .LVU60
|
||||
118:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
223 .loc 1 118 29 is_stmt 0 view .LVU61
|
||||
224 0088 4562 str r5, [r0, #36]
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
225 .loc 1 119 5 is_stmt 1 view .LVU62
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
226 .loc 1 119 9 is_stmt 0 view .LVU63
|
||||
227 008a FFF7FEFF bl HAL_DMA_Init
|
||||
228 .LVL5:
|
||||
119:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
ARM GAS /tmp/ccgREgit.s page 8
|
||||
|
||||
|
||||
343 .loc 1 172 1 view .LVU95
|
||||
344 .align 2
|
||||
345 .L20:
|
||||
346 0030 00200140 .word 1073815552
|
||||
347 0034 00380240 .word 1073887232
|
||||
348 0038 00080240 .word 1073874944
|
||||
349 003c 00000240 .word 1073872896
|
||||
350 .cfi_endproc
|
||||
351 .LFE241:
|
||||
353 .text
|
||||
354 .Letext0:
|
||||
355 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
|
||||
356 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
|
||||
357 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
|
||||
358 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
|
||||
359 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
|
||||
360 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
|
||||
361 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
|
||||
362 .file 9 "Core/Inc/main.h"
|
||||
ARM GAS /tmp/ccAF09Kg.s page 12
|
||||
229 .loc 1 119 8 discriminator 1 view .LVU64
|
||||
230 008e 18B9 cbnz r0, .L10
|
||||
231 .L7:
|
||||
124:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
232 .loc 1 124 5 is_stmt 1 view .LVU65
|
||||
124:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
233 .loc 1 124 5 view .LVU66
|
||||
234 0090 044B ldr r3, .L11+4
|
||||
235 0092 A363 str r3, [r4, #56]
|
||||
124:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
236 .loc 1 124 5 view .LVU67
|
||||
237 0094 9C63 str r4, [r3, #56]
|
||||
124:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
238 .loc 1 124 5 discriminator 1 view .LVU68
|
||||
239 .loc 1 132 1 is_stmt 0 view .LVU69
|
||||
240 0096 C2E7 b .L5
|
||||
241 .L10:
|
||||
121:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
242 .loc 1 121 7 is_stmt 1 view .LVU70
|
||||
243 0098 FFF7FEFF bl Error_Handler
|
||||
244 .LVL6:
|
||||
245 009c F8E7 b .L7
|
||||
246 .L12:
|
||||
247 009e 00BF .align 2
|
||||
248 .L11:
|
||||
249 00a0 00000240 .word 1073872896
|
||||
250 00a4 00000000 .word hdma_adc1
|
||||
251 00a8 10640240 .word 1073898512
|
||||
252 .cfi_endproc
|
||||
253 .LFE240:
|
||||
255 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
|
||||
256 .align 1
|
||||
257 .global HAL_ADC_MspDeInit
|
||||
258 .syntax unified
|
||||
259 .thumb
|
||||
260 .thumb_func
|
||||
262 HAL_ADC_MspDeInit:
|
||||
263 .LVL7:
|
||||
264 .LFB241:
|
||||
133:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
134:Core/Src/stm32f4xx_hal_msp.c **** /**
|
||||
135:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
|
||||
136:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||||
137:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer
|
||||
138:Core/Src/stm32f4xx_hal_msp.c **** * @retval None
|
||||
139:Core/Src/stm32f4xx_hal_msp.c **** */
|
||||
140:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||
141:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
265 .loc 1 141 1 view -0
|
||||
266 .cfi_startproc
|
||||
267 @ args = 0, pretend = 0, frame = 0
|
||||
268 @ frame_needed = 0, uses_anonymous_args = 0
|
||||
142:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1)
|
||||
269 .loc 1 142 3 view .LVU72
|
||||
270 .loc 1 142 10 is_stmt 0 view .LVU73
|
||||
271 0000 0268 ldr r2, [r0]
|
||||
272 .loc 1 142 5 view .LVU74
|
||||
ARM GAS /tmp/ccgREgit.s page 9
|
||||
|
||||
|
||||
273 0002 094B ldr r3, .L20
|
||||
274 0004 9A42 cmp r2, r3
|
||||
275 0006 00D0 beq .L19
|
||||
276 0008 7047 bx lr
|
||||
277 .L19:
|
||||
141:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1)
|
||||
278 .loc 1 141 1 view .LVU75
|
||||
279 000a 10B5 push {r4, lr}
|
||||
280 .LCFI6:
|
||||
281 .cfi_def_cfa_offset 8
|
||||
282 .cfi_offset 4, -8
|
||||
283 .cfi_offset 14, -4
|
||||
284 000c 0446 mov r4, r0
|
||||
143:Core/Src/stm32f4xx_hal_msp.c **** {
|
||||
144:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||||
145:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
146:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
|
||||
147:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */
|
||||
148:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE();
|
||||
285 .loc 1 148 5 is_stmt 1 view .LVU76
|
||||
286 000e 074A ldr r2, .L20+4
|
||||
287 0010 536C ldr r3, [r2, #68]
|
||||
288 0012 23F48073 bic r3, r3, #256
|
||||
289 0016 5364 str r3, [r2, #68]
|
||||
149:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
150:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration
|
||||
151:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3
|
||||
152:Core/Src/stm32f4xx_hal_msp.c **** */
|
||||
153:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3);
|
||||
290 .loc 1 153 5 view .LVU77
|
||||
291 0018 0821 movs r1, #8
|
||||
292 001a 0548 ldr r0, .L20+8
|
||||
293 .LVL8:
|
||||
294 .loc 1 153 5 is_stmt 0 view .LVU78
|
||||
295 001c FFF7FEFF bl HAL_GPIO_DeInit
|
||||
296 .LVL9:
|
||||
154:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
155:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA DeInit */
|
||||
156:Core/Src/stm32f4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle);
|
||||
297 .loc 1 156 5 is_stmt 1 view .LVU79
|
||||
298 0020 A06B ldr r0, [r4, #56]
|
||||
299 0022 FFF7FEFF bl HAL_DMA_DeInit
|
||||
300 .LVL10:
|
||||
157:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
158:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
159:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
|
||||
160:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
161:Core/Src/stm32f4xx_hal_msp.c ****
|
||||
162:Core/Src/stm32f4xx_hal_msp.c **** }
|
||||
301 .loc 1 162 1 is_stmt 0 view .LVU80
|
||||
302 0026 10BD pop {r4, pc}
|
||||
303 .LVL11:
|
||||
304 .L21:
|
||||
305 .loc 1 162 1 view .LVU81
|
||||
306 .align 2
|
||||
307 .L20:
|
||||
308 0028 00200140 .word 1073815552
|
||||
ARM GAS /tmp/ccgREgit.s page 10
|
||||
|
||||
|
||||
309 002c 00380240 .word 1073887232
|
||||
310 0030 00000240 .word 1073872896
|
||||
311 .cfi_endproc
|
||||
312 .LFE241:
|
||||
314 .global curr_step_start_N
|
||||
315 .section .bss.curr_step_start_N,"aw",%nobits
|
||||
316 .align 2
|
||||
319 curr_step_start_N:
|
||||
320 0000 00000000 .space 4
|
||||
321 .text
|
||||
322 .Letext0:
|
||||
323 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
|
||||
324 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h"
|
||||
325 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
|
||||
326 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
|
||||
327 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
|
||||
328 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
|
||||
329 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h"
|
||||
330 .file 9 "Core/Inc/main.h"
|
||||
ARM GAS /tmp/ccgREgit.s page 11
|
||||
|
||||
|
||||
DEFINED SYMBOLS
|
||||
*ABS*:00000000 stm32f4xx_hal_msp.c
|
||||
/tmp/ccAF09Kg.s:21 .text.HAL_MspInit:00000000 $t
|
||||
/tmp/ccAF09Kg.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
|
||||
/tmp/ccAF09Kg.s:80 .text.HAL_MspInit:00000034 $d
|
||||
/tmp/ccAF09Kg.s:85 .text.HAL_ADC_MspInit:00000000 $t
|
||||
/tmp/ccAF09Kg.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
|
||||
/tmp/ccAF09Kg.s:281 .text.HAL_ADC_MspInit:000000c4 $d
|
||||
/tmp/ccAF09Kg.s:289 .text.HAL_ADC_MspDeInit:00000000 $t
|
||||
/tmp/ccAF09Kg.s:295 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
|
||||
/tmp/ccAF09Kg.s:346 .text.HAL_ADC_MspDeInit:00000030 $d
|
||||
/tmp/ccgREgit.s:21 .text.HAL_MspInit:00000000 $t
|
||||
/tmp/ccgREgit.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
|
||||
/tmp/ccgREgit.s:80 .text.HAL_MspInit:00000034 $d
|
||||
/tmp/ccgREgit.s:85 .text.HAL_ADC_MspInit:00000000 $t
|
||||
/tmp/ccgREgit.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
|
||||
/tmp/ccgREgit.s:249 .text.HAL_ADC_MspInit:000000a0 $d
|
||||
/tmp/ccgREgit.s:256 .text.HAL_ADC_MspDeInit:00000000 $t
|
||||
/tmp/ccgREgit.s:262 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
|
||||
/tmp/ccgREgit.s:308 .text.HAL_ADC_MspDeInit:00000028 $d
|
||||
/tmp/ccgREgit.s:319 .bss.curr_step_start_N:00000000 curr_step_start_N
|
||||
/tmp/ccgREgit.s:316 .bss.curr_step_start_N:00000000 $d
|
||||
|
||||
UNDEFINED SYMBOLS
|
||||
HAL_GPIO_Init
|
||||
|
||||
Reference in New Issue
Block a user