ChTheo/E502_ADC_BFfirmware
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firmware is working and compiling! modified cmd L502_BF_CMD_CODE_GET_PARAM (aka f_cmd_get_param()). Added param 87, which returns specific number 0xADEF (decimal 44527).

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Theodor Chikin
2025-06-27 17:50:46 +03:00
parent c73ead2643
commit 63d839924e
46 changed files with 8715 additions and 8561 deletions
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18
src/l502_fpga.c
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@ -1,11 +1,11 @@
/** @addtogroup fpga_regs
@{
@file l502_fpga.c
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> SPI.
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> fpga_spi_init().
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> fpga_reg_write(), <EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> fpga_reg_read(). */
Файл содержит логику передачи команд для чтения/записи регистров
ПЛИС по SPI.
Изначально SPI должен быть проинициализирован с помощью fpga_spi_init().
После этого можно осуществлять запись с помощью fpga_reg_write(), а
чтение с помощью fpga_reg_read(). */
#include <cdefBF523.h>
@ -17,14 +17,14 @@
static uint16_t f_spi_rw(uint16_t word) {
/* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> - <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/* если в было принято уже слово - то читаем его, чтобы освободить буфер приема */
if (*pSPI_STAT & RXS) {
volatile uint16_t dummy;
dummy = *pSPI_RDBR;
}
*pSPI_TDBR = word;
/* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> */
/* ждем пока примем новое слово */
while (!(*pSPI_STAT&RXS)) {
continue;
}
@ -34,9 +34,9 @@ static uint16_t f_spi_rw(uint16_t word) {
void fpga_spi_init(void) {
/* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI */
/* настройка SPI */
*pSPI_BAUD = 2; /* SPI CLK = 132.5/(2*2) = 33.125 */
*pSPI_CTL = SPE | MSTR | SIZE | GM | TDBR_CORE; /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, MSB first, 16-bit, CPHA=0, CPOL=0 */
*pSPI_CTL = SPE | MSTR | SIZE | GM | TDBR_CORE; /* Мастер, MSB first, 16-bit, CPHA=0, CPOL=0 */
*pSPI_FLG = FLS1;
*pPORTG_MUX = (*pPORTG_MUX & 0xFFFC) | 2;